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Design of CMOS Up-Conversion Mixer for RF Integrated Circuit

Ramiah, Harikrishnan, and Tun Zainal Azni Zulkifli, and Mohammad Awan, (2007) Design of CMOS Up-Conversion Mixer for RF Integrated Circuit. Elektrika Journal of Electrical Engineering, 9 (1). pp. 1-8. ISSN 01284428

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Official URL: http://fke.utm.my/elektrika/june07/paper1june07.pdf

Affiliations

Universiti Sains Malaysia, School of Electrical & Electronic Engineering, RFIC Design Group
Universiti Teknologi PETRONAS

Abstract

The design, analysis and implementation of a high frequency 1-3GHz tunable pure NMOS Quadrature Up-Conversion mixer topology are presented. The mixer is implemented in a deep submicron 0.25μm CMOS process technology. Utilizing an off-chip tunable inductor had achieved tunable range of frequency. Various passive components had been incorporated in the circuitry to increase the linearity of the topology. The mixer, which is a configuration of a balanced modulator, is composed from a Parallel Structure Low Voltage Multiplier topology, High Gain Phase Shifting network and a Differential Cascode amplification stage at the output. Various topology of four quadrant multiplier, biased in different region of operation had been simulated and analyzed. The utilized topology requires fewer amounts of stacked transistors, thus reducing the voltage headroom requirement of the circuitry. The proposed high gain phase shifter relaxes the requirement of cascading several stages of limiting amplifier at the output. Operating from a power supply of 2.0V, it consumes 150mW of power, with an OIP3 of 0dBm and 1dB compression level of 4.6dB.

Item Type:Journal
Keywords:Balanced-modulator, CMOS analog integrated circuit, Mixers, Phase shifters, RFIC.
Subjects:T Technology, Engineering
ID Code:2471

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